https://embedded.fi.muni.cz/ 2026-05-01T01:25:34+0100 https://embedded.fi.muni.cz/ https://embedded.fi.muni.cz/_media/favicon.ico text/html 2025-01-09T09:30:04+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/activities?rev=1736415004&do=diff 2025 Lasergame [Tron Lase Arena - results] text/html 2022-08-08T09:06:59+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/contacts?rev=1659946019&do=diff Contacts Name Email Office prof. Ing. Václav Přenosil, CSc. <prenosil@fi.muni.cz> A414 Zdeněk Matěj <matej.zdenek@mail.muni.cz> B401 Oldřich Pecák <oldrich.pecak@mail.muni.cz> B202 Jiří Čulen <jiri.culen@mail.muni.cz> B202 text/html 2026-03-04T08:11:43+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/documents?rev=1772611903&do=diff Work safety [ 2025 - work safety] Presentations [ 2026 - EmLab] text/html 2021-02-16T13:35:33+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/equipment?rev=1613482533&do=diff Equipment The laboratory is equipped with 12 PCs with Windows 10. Also available in the lab: * Power sources * Kits for microcontrollers (8-32 bit) - Microchip, Atmel, Freescale, NXP * Processor programmers * FPGA kits - Altera, Xilinx * text/html 2021-02-16T13:21:39+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/information?rev=1613481699&do=diff EmLab information Connection Device Wifi: * ESSID: EMLAB * PASSWORD: BLAMEBLAME * note: restricted only to university ip range text/html 2024-07-08T14:30:12+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/overview?rev=1720445412&do=diff Overview of courses in EmLab Spring: * PA176 Architecture of Digital Systems II * PB171 Seminar on Digital System Architecture * PV172 Architecture of Digital Systems * PV191 Embedded systems seminar * PV193 Accelerating Algorithms at Circuit Level * PV194 External Environments of Digital Systems * PA221 Hardware description languages II Autumn: * PA174 Design of Digital Systems II * PA175 Digital Systems Diagnostics II * PA192 Secure hardware-based system design * PB17… text/html 2020-05-05T01:05:27+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/pa174?rev=1588637127&do=diff PA174 - Design of Digital Systems II (podzim 2015) * room B411 at 10-12 on Mon Content * Encoding and data representation * Logic algebra and optimization of the logical terms * Implementation arithmetical and logical operations into computer machines text/html 2020-05-05T01:05:11+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/pa192?rev=1588637111&do=diff PA192 - Secure hardware-based system design HW & SW * Altera DE-2 - Cyclone II - EP2C35F672 - old Quartus II 13.0sp1 * Altera DE-1 - Cyclone V - SoC - Altera Quartus II 16.0 2. lecture * [FPGA] * HW - Verilog intro [PDF] * [Example project DE-1 SoC Cyclone V] * [DE-1 SoC Cyclon V - Quartus settings] 3. lecture * [LAB 1 - Execrice 1 - homework] * [LAB 1 - project example] * [ LAB 1 - Solution] 4. lecture * [ LAB 2 - Excercise 2 - homework] * [ LAB 2 - Solution] 5. l… text/html 2020-05-05T01:04:56+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/pb170?rev=1588637096&do=diff Výuka PB170 - Seminář z konstrukce digitálních systémů * výuka bude ve dvou skupinách v místnosti A415 * ukončení kolokvium - za projekt (s dokumentací) * dochazka nutná (povoleny 2 neomluvené absence) 1. cvičení * příklady: 8 sudů vína a 3 vězni ( tři klobouky, sto vězňů ) text/html 2020-05-05T01:04:37+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/pb171?rev=1588637077&do=diff PB171 (2018) * Taught in english/czech * 2 + 1 credits (colloquium) - home preparation supposed * Attendance - up to one unjustified absence * Defence - practical tasks + consultations * Contact: Zdeněk Matěj, xmatej@fi.muni.cz, B401 Content text/html 2020-04-05T20:10:45+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/pv198?rev=1586113845&do=diff PV198 course - One-chip Controllers (autumn 2019) * teaching takes place in room A415 * mandatory short homework for every lesson * individual final project required * max 2 unauthorized absences Syllabus * Course introduction, hardware, IDE, SDK text/html 2020-04-05T20:12:33+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/pv200?rev=1586113953&do=diff PV200 - Introduction to hardware description languages * Room A415 - monday - 16:00 -- 18:00 * xmatej@fi.muni.cz HW & SW * Úvod do VHDL * Altera DE-2 - Cyclone II - EP2C35F672 - old Quartus II 13.0sp1 * Altera DE-1 - Cyclone V - SoC - Altera Quartus II 16.0 Content * Programmable structures fundamentals * Verilog HDL – concepts, basic syntax, abstraction levels, design hierarchy. text/html 2021-02-16T13:16:41+0100 Anonymous (anonymous@undisclosed.example.com) https://embedded.fi.muni.cz/vyuka/thesis?rev=1613481401&do=diff Bachelor and diploma works In our laboratory it is possible to work on bachelor's and master's theses in the field of embedded systems. It is also possible to take up work in cooperation with our industrial partners: * VF, a.s. * NXP Semiconductors